Many applications in modern electronics require that continuous-time signals be converted to discrete signals for processing using digital computers and signal processors. Typically, this transformation is made using a conventional analog-to-digital converter (ADC). However, the present inventor has discovered that each of the presently existing ADC approaches exhibits shortcomings that limit overall performance at very high sample rates.
Due to parallel processing and other innovations, the digital information processing bandwidth of computers and signal processors has advanced beyond the capabilities of state-of-the art ADCs. Converters with higher instantaneous bandwidth are desirable in certain circumstances. However, existing solutions are limited by instantaneous bandwidth (effective sample rate), effective conversion resolution (number of effective bits), or both.
The resolution of an ADC is a measure of the precision with which a continuous-time continuously variable signal can be transformed into a quantized signal, and typically is specified in units of effective bits (B). When a continuous-time continuously variable signal is converted into a discrete-time discretely variable signal through sampling and quantization, the quality of the signal degrades because the conversion process introduces quantization, or rounding, noise. High-resolution converters introduce less quantization noise because they transform continuously variable signals into discrete signals using a rounding operation with finer granularity. Instantaneous conversion bandwidth is limited by the Nyquist criterion to a theoretical maximum of one-half the converter sample rate (the Nyquist limit). High-resolution conversion (of ≧10 bits) conventionally has been limited to instantaneous bandwidths of about a few gigahertz (GHz) or less.
Converters that quantize signals at a sample rate (fS) that is at or slightly above a frequency equal to twice the signal bandwidth (fB) with several or many bits of resolution are conventionally known as Nyquist-rate, or baud-sampled, converters. Prior-art Nyquist-rate converter architectures include conventional flash and conventional pipelined analog-to-digital converters (ADCs). Conventional flash converters potentially can achieve very high instantaneous bandwidths. However, the resolution of flash converters can be limited by practical implementation impairments that introduce quantization errors, such as clock jitter, thermal noise, and rounding/gain inaccuracies caused by component tolerances. Although flash converters potentially could realize high resolution at instantaneous bandwidths greater than 10 GHz, this potential has been unrealized in commercial offerings. Conventional pipelined converters generally have better resolution than conventional flash converters, because they employ complex calibration schemes and feedback loops to reduce the quantization/rounding errors caused by these practical implementation impairments. However, pipelined converters typically can provide less than about 1 GHz of instantaneous bandwidth.
Another conventional approach that attempts to reduce quantization noise and errors uses an oversampling technique. Oversampling converters sample and digitize continuous-time, continuously variable signals at a rate much higher than twice the analog signal's bandwidth (i.e., fS>>fB). Due to operation at very high sample rates, the raw high-speed converters used in oversampling approaches ordinarily are capable of only low-resolution conversion, often only a single bit. Conventional oversampling converters realize high resolution by using a noise shaping operation that ideally attenuates quantization noise and errors in the signal bandwidth, without also attenuating the signal itself. Through shaping of quantization noise and subsequent filtering (digital signal reconstruction), oversampling converters transform a high-rate, low-resolution output into a low-rate, high-resolution output.
FIGS. 1A-C illustrate block diagrams of conventional, lowpass oversampling converters. A typical conventional oversampling converter uses a delta-sigma (ΔΣ) modulator 7A-C to shape or color quantization noise. As the name implies, a delta-sigma modulator 7A-C shapes the noise that will be introduced by quantizer 10 by performing a difference operation 8 (i.e., delta) and an integration operation 13A-C (i.e., sigma), e.g.,
      I    ⁡          (      z      )        =                    1                  1          -                      z                          -              1                                          ⁢                          ⁢      or      ⁢                          ⁢              I        ⁡                  (          s          )                      =                  1                  s          ·          RC                    .      Generally speaking, the delta-sigma modulator processes the signal with one transfer function (STF) and the quantization noise with a different transfer function (NTF). Conventional transfer functions are of the form STF(z)=z−1 and NTF(z)=(1−z−1)P, where z−1 represents a unit delay equal to TS=1/fS, and P is called the order of the modulator or noise-shaped response. The STF frequency response 30 and NTF frequency response 32 for a delta sigma modulator with P=1 are shown in FIG. 2.
There exist various types of conventional delta-sigma modulators that produce comparable signal and noise transfer functions. A delta-sigma modulator that employs an auxiliary sample-and-hold operation, either explicitly as in sample-and-hold circuit 6 in converters 5A&C shown in FIGS. 1A&C, respectively, or implicitly using switched-capacitor circuits (e.g., integrators), for example, is commonly referred to as a discrete-time, delta-sigma (DT ΔΣ) modulator. A delta-sigma modulator, such as circuit 7B shown in FIG. 1B, that does not employ an auxiliary sample-and-hold operation is commonly referred to as a continuous-time, delta-sigma (CT ΔΣ) modulator. Discrete-time modulators have been the preferred method in conventional converters because DT ΔΣ modulators are more reliable in terms of stable (i.e., insensitivity to timing variations) and predictable (i.e., linearity) performance. See Ortmans and Gerfers, “Continuous-Time Sigma-Delta A/D Conversion: Fundamentals, Performance Limits and Robust Implementations”, Springer Berlin Heidelberg 2006. The converters 5A&B, shown in FIGS. 1A&B, respectively, employ delta-sigma modulators with filtering 13A&B in the feed-forward path from the output of the modulator subtractor 8 to the input of the quantizer 10, in an arrangement known as an interpolative structure. An alternative DT ΔΣ modulator is the error-feedback structure of converter 5C shown in FIG. 1C, which has no feed-forward filtering and a single feedback filter. See D. Anastassiou “Error Diffusion Coding in A/D Conversion,” IEEE Transactions on Circuits and Systems, Vol. 36, 1989. The error-feedback structure is conventionally considered suitable for digital implementations (i.e., digital-to-analog conversion), but not for analog implementations due to its increased sensitivity to component mismatches compared to the interpolative structure. See Johns, D. and Martin, K., “Analog Integrated Circuit Design”, John Wiley & Sons 1997.
As illustrated in FIGS. 1A-C, conventional oversampling converters employ a combP+1 or sincP+1 filter 12 (also referred to in the prior art as a cascaded integrator-comb filter) for output filtering and signal reconstruction. Conventional oversampling converters with a first-order noise-shaped response realize the combP+1 filter 12 in three steps: second-order integration 12A, e.g., with a transfer function of
      T    INT    =      1                  (                  1          -                      z                          -              1                                      )            2      at the converter sample rate (fS), followed by downsampling 12B by the converter excess-rate oversampling ratio (i.e., N=½·fS/fB), followed by second-order differentiation 12C, e.g., with a transfer function ofTDIFF=(1−z−1)2 at the converter output data rate (i.e., conversion rate of fCLK). A generalized combP+1 filter transfer function of
            T      COMB        =                  (                              1            -                          z                              -                N                                                          1            -                          z                              -                1                                                    )                    P        +        1              ,where P is the order of the modulator, produces frequency response minima at multiples of the conversion rate (fCLK), and conventionally has been considered optimal for oversampling converters. Thus, in the specific example given above, it is assumed that a modulator with first-order response (i.e., P=1) is used.
The delta-sigma converters 5A-C illustrated in FIGS. 1A-C are conventionally known as lowpass, delta-sigma converters. A variation on the conventional lowpass converter, employs bandpass delta-sigma modulators to allow conversion of narrowband signals that are centered at frequencies above zero. Exemplary bandpass oversampling converters 40A&B, illustrated in FIGS. 3A&B, respectively, include a bandpass delta-sigma modulator 42A or 42B, respectively, that provides, as shown in FIG. 4, a signal response 50 and a quantization noise response 51 with a minimum 52 at the center of the converter Nyquist bandwidth (i.e., ¼·fS). After single-bit high-speed quantization/sampling 10 (or, with respect to converter 40A shown in FIG. 3A, just quantization, sampling having been performed in sample-and-hold circuit 6), filtering 43 of shaped quantization noise, similar to that performed in the standard conventional lowpass oversampling converter (e.g., any of converters 5A-C), is performed, followed by downsampling 44.
Bandpass delta-sigma modulators are similar to the more-common lowpass variety in several respects: The conventional bandpass delta-sigma modulator has both discrete-time (converter 40A shown in FIG. 3A) and continuous-time (converter 40B shown in FIG. 3B) forms. Like the lowpass version, the bandpass delta-sigma modulator 42A&B shapes noise from quantizer 10 by performing a difference operation 8 (i.e., delta) and an integration operation 13A&B (i.e., sigma), respectively, where
            H      ⁡              (        z        )              =                            -                                    z                              -                1                                                    1              +                              z                                  -                  2                                                                    ⁢                                  ⁢        and        ⁢                                  ⁢                  H          ⁡                      (            s            )                              =                                                  LC                        ·            s                                              LC              ·                              s                2                                      +            1                          =                                                            ω                0                            ·              s                                                      s                2                            +                              ω                0                2                                              ⁢                      |                                          ω                0                            =                              π                ·                                                      f                    s                                    /                  2                                                              .                      ⁢        Also, the bandpass modulator processes the signal with one transfer function (STF) and the quantization noise with a different transfer function (NTF). The conventional bandpass DT ΔΣ modulator, shown in FIG. 3A, is considered second-order (i.e., P=2) and has a STF(z)=z−1 and a NTF(z)=1+z−2, where z−1 represents a unit delay equal to TS. Linearized, continuous-time transfer functions for the second-order CT ΔΣ modulator, shown in FIG. 3B, are of the form
      STF    ⁡          (      s      )        =                              ω          ·          s                                      s            2                    +                      ω            ·            s                    +                      ω            2                              ⁢                          ⁢      and      ⁢                          ⁢              NTF        ⁡                  (          s          )                      =                                        s            2                    +                      ω            2                                                s            2                    +                      ω            ·            s                    +                      ω            2                              .      It should be noted that discrete-time modulators have a signal transfer function (STF) that generally is all-pass, whereas continuous-time modulators have a linearized signal transfer function (STF) that generally is not all-pass (e.g., bandpass for the above example). Also, the noise transfer function (NTF) of a real bandpass delta-sigma modulator is at minimum a second-order response.
Conventional oversampling converters can offer very high resolution, but the noise shaping and signal reconstruction process generally limits the utility of oversampling converters to applications requiring only low instantaneous bandwidth. To improve the instantaneous bandwidth of oversampling converters, multiple oversampling converters can be operated in parallel using the time-interleaving (time-slicing) and/or frequency-interleaving (frequency-slicing) techniques developed originally for Nyquist converters (i.e., flash, pipelined, etc.). In time-interleaving, a high-speed sample clock is decomposed into lower-speed sample clocks at different phases. Each converter in the time-interleaving array is clocked with a different clock phase, such that the conversion operation is distributed in time across multiple converters (i.e., polyphase decomposition). While converter #1 is processing the first sample, converter #2 is processing the next sample, and so on.
For interleaving in frequency, the total bandwidth of the continuous-time signal is uniformly decomposed (i.e., divided) into multiple, narrowband segments (i.e., sub-bands). Each parallel processing branch converts one narrowband segment, and all the converter processing branches operate from a single, common sampling clock. Conventional frequency-interleaving converters include frequency-translating hybrid (FTH) converters and hybrid filter bank (HFB) converters. In representative implementations of the FTH converter, such as circuit 70A shown in FIG. 5A, individual frequency bands are downconverted to baseband and separated out using lowpass filters. More specifically, the input signal 71 is provided to a set of multipliers 72 together with the band's central frequencies 74A-76A. The resulting baseband signals are then provided to identical lowpass filters 78 that are designed to spectrally decompose (i.e., slice) the input signal (i.e., a process referred to as signal analysis), in addition to minimizing aliasing. Each such filtered baseband signal is then digitized 80A, digitally upconverted 82A using digitized sinusoids 83A-C (or alternatively simply upsampled) and then bandpass filtered 84A-86A in order to restore the input signal to its previous frequency band (i.e., a process referred to as signal synthesis). Finally, the individual bands are recombined in one or more adders 88. Each converter 80A in the interleaved array is able to operate at a lower sampling frequency equal to twice the bandwidth of each subdivided, downcoverted band (i.e., the portion of the input signal intended to be converted by the respective processing branch). Similar processing occurs in HFB converter, except that the individual frequency bands are separated out using analog (frequency decomposition) bandpass filters before downconversion to baseband (see Petraglia, A., “High Speed A/D Conversion using QMF Filter Banks”, Proceedings: IEEE International Symposium on Circuits and Systems, 1990).
The conventional parallel delta-sigma analog-to-digital converter (ΠΔΣ ADC) 70B, shown in FIG. 5B, is similar in design and operation to the conventional frequency-interleaved converter 70A shown in FIG. 5A, except that oversampling converters 80B are used in place of multi-bit digitizers 80A and anti-aliasing filters 78. See I. Galton and H. Jensen, “Delta Sigma Modulator Based A/D Conversion without Oversampling”, IEEE Transactions on Circuits and Systems, Vol. 42, 1995 and I. Galton and T Jensen, “Oversampling Parallel Delta-Sigma Modulator A/D Conversion”, IEEE Transactions on Circuits and Systems, Vol. 43, 1996). As shown in FIG. 5B, the primary advantage of the prior-art ΠΔΣ converter 70B is that the oversampling operation of the delta-sigma modulators 89 eliminates the need for the anti-aliasing function provided by the analog frequency decomposition filters. The conventional ΠΔΣ ADC generally employs discrete-time, lowpass delta-sigma modulators 89 and uses continuous-time Hadamard sequences (νi(t)) 74B-76B and discrete-time Hadamard sequences (ui|[n]) 89A-C, instead of sinusoidal waveforms, to reduce the circuit complexity associated with the downconversion 72B and upconversion 82B operations. In some instances, bandpass delta-sigma modulators are used to eliminate the need for analog downconversion completely, in a process sometimes called Direct Multiband Delta-Sigma Conversion (MBΔΣ). See Aziz, P., “Multi Band Sigma Delta Analog to Digital Conversion”, IEEE International Conference on Acoustics, Speech, and Signal Processing, 1994 and A. Beydoun and P. Benabes, “Bandpass/Wideband ADC Architecture Using Parallel Delta Sigma Modulators”, 14th European Signal Processing Conference, 2006. In addition to multiband delta-sigma modulation, conventional oversampling frequency-interleaving converters (i.e., ΠΔΣ ADC and MBΔΣ) employ conventional, decimating combP+1 (sincP+1) lowpass filters (ΠΔΣ ADC) or a conventional, transversal finite impulse response (FIR) filter bank (MBΔΣ) for signal reconstruction.
The present inventor has discovered that conventional ΠΔΣ converters, as shown in FIG. 5B, and conventional MBΔΣ converters have several disadvantages that limit their utility in applications requiring very high instantaneous bandwidth and high resolution. These disadvantages, which are discussed in greater detail in the Description of the Preferred Embodiment(s) section, include: 1) use of delta-sigma modulation (Galton, Aziz, and Beydoun) impairs high-frequency operation because the sample-and-hold function limits the performance of DT ΔΣ modulators and non-ideal circuit behavior can degrade the noise-shaped response and stability of CT ΔΣ modulators; 2) use of decimating combP+1 filters for signal reconstruction in ΠΔΣ converters (Galton) introduces amplitude and phase distortion that is not completely mitigated by the relatively complex output equalizer (i.e., equalizer 90 having transfer function F′(z) in FIG. 5B); 3) use of Hadamard sequences for downconversion and upconversion in ΠΔΣ converters introduces conversion errors related to signal-level mismatches and harmonic intermodulation products (i.e., intermodulation distortion); 4) use of conventional FIR filter-bank technology (as in Aziz) or Hann window function filters (as in Beydoun) for signal reconstruction in MBΔΣ converters limits the practical number of parallel processing branches due to signal-processing complexities (i.e., number of multiply/accumulate operations), particularly for high-frequency, multirate (i.e., polyphase) filter topologies; and 5) absence of feedback from the signal-reconstruction filter outputs to the ΔΣ modulator, means that ΔΣ modulator component tolerances can degrade converter performance by creating mismatches between the notch frequency (fnotch) in the NTF and notch, the center frequency of the narrowband reconstruction filter response. Possibly due to these disadvantages, the instantaneous bandwidth and resolution performance of conventional ΠΔΣ and MBΔΣ converters have not been able to surpass that of conventional pipelined converters.
In addition to ΠΔΣ and MBΔΣ, parallel arrangements of delta-sigma modulators are the subject of several United States patents, such as U.S. Pat. Nos. 7,289,054, 6,873,280, and 6,683,550. However, these patents generally fail to adequately address the primary issues associated with the high-resolution, high-sample-rate conversion of continuous-time signals to discrete-time signals. One technique, described in U.S. Pat. No. 7,289,054, uses digitization of noise shaping circuit residues for increasing converter precision, rather than using reconstruction filter banks for quantization noise reduction. Another technique, described in U.S. Pat. No. 6,873,280, addresses conversion of digital (discrete-time, discretely variable) signals to other forms, rather than the conversion of analog (continuous-time, continuously variable) signals to digital signals. A third technique, described in U.S. Pat. No. 6,683,550, employs multi-bit, first-order modulators which are not suitable for high-precision, bandpass oversampling applications since these application require modulators that are at least second order.